Chip cooling

Overview

Chip cooling

One of the main challenges to the continued improvement of integration density of information processing equipment is the removal of dissipated heat. This is caused by the increased power density resulting from smaller transistors and faster clock speeds. Thermophysical research helps to improve heat transfer from the transistor junctions through the chip and interfaces, and eventually to the ambient air or the coolant circuit. With microfabrication techniques we create interfaces and coolers with high aspect ratio patterns. Hierarchical nested structures use principles ubiquitous in nature to reduce the pressure drop that occurs when paste is squeezed out of gaps, thus creating high-performance thermal interfaces, as well as for liquid cooling with many tens of thousands of capillaries or jets.

Interlayer cooling was proved to be an effective heat removal concept that scales with the number of tiers in vertically integrated packages, therefore relaxing electrical constraints substantially to heat flux levels of 250 W/cm2. It also enables on-stack integration of optical communication as well as high-power RF devices, resulting in high-performance heterogeneous chip packages. The use of water as a coolant will minimize cooling power dissipated in data centers with respect to the inefficient air-cooling methods utilized today. Furthermore it makes high-grade heat available for reuse in residential heating systems. This reduces the effective CO2 emission of data centers to a minimum.