Heterogeneous integration designates technologies that can be integrated on one platform device. Or it can designate materials that are not compatible and cannot be manufactured on the same substrate, at least not in a cost-effective manner. In microelectronic and microsystems, such multi-technology devices refer to systems-on-chip (SoCs) or systems-in-package (SiPs). SiPs are a combination of one or more wire-bonded or flip-chip dies with one or more passive components attached to a standard package, whereas SoCs aim to integrate all functionalities on the same die.
The entity forms a module that can be used as a standard component, allowing optimization of the system at a higher hierarchical level (module) and outperforming traditional systems in which the subsystem is optimized at a lower level.
Although SiPs, in contrast to SoCs, have the advantage that standard dies and passive components as well as standard packaging technologies are used, which provides flexibility and at least for low and medium production volumes a cost advantage, SoCs have a greater performance improvement potential. By integrating all functionalities on one die instead of distributing them across different chips interconnected via a wiring board, performance is enhanced owing to the shorter interconnect path (reduced signal delay and power consumption). Moreover, more massively parallel processing is possible (no large chip-to-chip communication bus).
Although a greater investment is required to develop the technologies allowing this high level of integration, it leads to some cost advantage thanks to, for example, simplified packaging and smaller system form factors. Current SoCs are mainly related to standard CMOS technology, in which microelectronic devices, traditionally produced separately for reasons of cost and flexibility, are merged on one die. Examples of this are embedded DRAM in ASIC, dynamic graphic processing in multicore processor chips, and processors with various peripherals.
SoCs that provide desirable integrated solutions are generally limited to technologies that, for most of the fabrication process, are compatible and thus require no or only minor processing changes. SoCs made by integrating heterogeneous devices require a major change in their fabrication process. Here the challenge is to merge subdevices with incompatible materials and processes to obtain the desired functionality.
Integration of MEMS and/or optoelectronic devices on CMOS is an example where considerable research and development has been done. In most cases, the problem has been solved by making a compromise on the global performance and by trying to make the technologies compatible. Even if some have achieved product status, it remains a challenge to merge these technologies at advantageous costs and performance.