IBM Research
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Nanowire growth
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Our nanowire growth activity is focused on fabricating specific
nanowires for later integration into electronic devices such as field-effect-transistors.
Specifically we are concentrating on group IV (Si & Ge) and,
most recently, on III-V nanowires.
In our project, we use two approaches to fabricate nanowires.
The first method relies on patterning a resist layer using electron
lithography, followed by dry etching. This is very similar to processes
used today in semiconductor manufacturing. In contrast, the second
method relies on a process called vapor-liquid-solid (VLS) growth
[1,2]. Here, a metal particle is used as catalytic seed to
promote the growth of a nanowire. During VLS growth, the metal
particle first forms a eutectic melt with a semiconducting material,
such as silicon, that is supplied from the gas phase. After reaching
a critical silicon concentration in the liquid seed, a solid crystal
having a similar diameter as the seed particle precipitates out
from the seed. Seed particles are predominantly small colloidal
gold particles with diameters down to a few nanometers that can
be synthesized using wet chemistry. Whereas colloidal Au particles
are simple to synthesize, their controlled placement on substrates
was only recently achieved [3]. Alternatively, nanowires can be
grown from gold dots that are patterned using electron lithography
and metal deposition techniques as shown in the figure at right
[4]. Nanowires that grow epitaxially on a substrate are particularly
well suited for subsequent device integration [5,6,7]. |
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References
| [1] |
S. Wagner and W. C. Ellis, Appl. Phys. Lett. 4, 89 (1964). |
| [2] |
E.I. Givargizov, Growth of Whiskers by the Vapor — Solid-Liquid
in Current Topics in Material Science, edited by K. Kaldis
(North-Holland, Amsterdam) 1, 79 (1978). |
| [3] |
T. Kraus, L. Malaquin, H. Schmid, W. Riess, N. D. Spencer, H.
Wolf, Nanoparticle printing with single-particle resolution,
Nature Nanotechnology 2, 570 - 576 (02 Sep 2007). |
| [4] |
H. Schmid, M. T. Björk, J. Knoch, H. Riel, P. Rice,
T. Topuria, and W. Riess, "Patterned Epitaxial Vapor-Liquid-Solid
Growth of Silicon Nanowires on Si(111) using Silane," accepted J.
Appl. Phys (2007). |
| [5] |
V. Schmidt, H. Riel, S. Senz, S. Karg, W. Riess, U. Gösele,
Realization of a Silicon Nanowire Vertical Surround-Gate
Field-Effect Transistor, Small 2(1) (January 2006) 85-88
(published online: 7 Nov 2005). |
| [6] |
M.T. Björk, O. Hayden, H. Schmid, H. Riel, W. Riess,
Vertical Surround-Gated Silicon Nanowire Impact Ionization
Field-Effect Transistors, Appl. Phys. Lett. 90, 142110
(2007). |
| [7] |
C. Thelander, P. Agarwal, S. Brongersma, J. Eymery, L. F.
Feiner, A. Forchel, M. Scheffler, W. Riess, B. J. Ohlsson,
U. Gösele, and L. Samuelson, "Nanowire-based One-dimensional
Electronics," Materials Today, Oct. 2006,
Vol. 9, No. 10. |
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