|
The gate stack used in current-generation, metal-oxide semiconductor
field-effect transistors (MOSFET) consists of silicon, an insulating
layer of silicon dioxide, and a metallic gate electrode made of
polysilicon. The improvement of transistor performance during the
past 40 years has been achieved mainly through geometrical scaling
of this gate stack. This approach is running out of steam because
the insulating silicon dioxide in current device generations has
a thickness of only about five atomic layers. Owing to direct tunneling,
the gate leakage current increases dramatically, thereby leading
to a high current in the off-state of the transistors and significant
heat dissipation. The operating frequency of the transistors can
no longer be scaled according to Moore's law.
Future CMOS performance enhancements will result from materials
innovation instead of pure scaling. New materials will be introduced
in the gate stack: Layers with higher dielectric constant (so-called
high-κ materials) will replace silicon dioxide as the gate
dielectric. Amorphous HfO2-based films (κ~20) are candidates
to be used first, and epitaxial materials with even higher dielectric
constants could be used later. As a consequence of introducing high-κ
dielectrics, the gate metal has to be changed from polysilicon to
other metallic layers (TiN, TaN). Finally it will be necessary to
replace silicon by a semiconducting material with higher carrier
mobility such as Ge or III-V materials (GaAs, InAs).
|
 |
 |
Schematic cross section of a MOSFET and TEM view
of such a device with details of the gate stack. |
 |
 |
|
 |
 |
 |
Schematic of the perovskites crystal structure,
showing the building principle of the unit cell. |
 |
 |
|
 |
 |
 |
HRTEM view of an epitaxial SrTiO3 film grown on
Si(100). |
 |
 |
|
 |
 |
 |
General view of molecular beam epitaxy (MBE) laboratory
with 2-inch wafer system and the new 200-mm MBE cluster. |
 |
 |
|
 |
 |
 |
SEM view of a long channel transistor based on
epitaxial high-κ gate oxide and Pt electrodes. S
= source, D = drain, G = gate. The green areas
are the source and drain implant viewed by electron beam induced
current (EBIC) microscopy. |
 |
 |
|
 |
 |
 |
ZRL clean room. |
 |
 |
|
 |
 |
 |
General
characteristics of long-channel MOSFETs based on 4-nm epitaxial
SrHfO3 gate dielectric grown on Si(100) with equivalent oxide
thickness EOT = 0.69 nm. Channel length L and width W
are 10 μm. |
 |
 |
|
 |
 |
|
|
One of our team activities is the investigation of new high-κ
dielectric materials on silicon. We are working on amorphous (HfO2-based)
and epitaxial materials like the perovskites SrTiO3, SrZrO3 and
SrHfO3. For best device performances, the whole stack requires the
right choice of materials, a precise control over the quality of
the different layers and of their respective interfaces. Our choice
of deposition technique is molecular beam epitaxy (MBE), which combines
clean UHV conditions with a high versatility in growing new materials.
We operate stand-alone, oxide-MBE systems and are currently building
a complex 200-mm cluster MBE tool, which integrates growth chambers
for GaAs, Si/Ge, and oxides in a UHV environment.
One of our challenges is to search for novel high-κ dielectric
candidates with appropriate properties such as
| · |
large band gap and band offset with Si |
| · |
good thermodynamic stability with Si |
| · |
compatibility with metal gate electrode |
| · |
good film morphology (no grain boundaries) |
| · |
high-quality interface (low defect density) |
| · |
large capacitance (Cox) |
| · |
low current leakage |
and to fabricate long channel transistors with optimized properties,
in particular high channel mobility at low equivalent oxide thicknesses
(EOT).
The structural properties of the deposited layers are analyzed
by reflection high energy electron diffraction (RHEED), X-ray diffractometry
(XRD), ellipsometry, X-ray photoelectron spectroscopy (XPS), high-resolution
transmission electron microscopy (HRTEM) and atomic force microscopy
(AFM).
The electrical properties of our films (effective oxide thickness,
leakage, carrier mobility) are derived from MOS capacitors and long-channel
FETs, which we fabricate in-house, using our clean room facility.
In particular current-voltage I-V and capacitance-voltage
C-V measurements are performed using standard equipment.
The trapped charges at the interface as well as in the bulk of the
oxide are investigated by several techniques: among them the well-known
peak conductance method on MOS structures and the pulse based charge
pumping method on MOSFETs.
References
| [1] |
Field effect transistors with SrHfO3 as
gate oxide
C. Rossel, B. Mereu, C. Marchiori, D. Caimi, M. Sousa, A. Guiller,
H. Siegwart. R. Germann, J.-P. Locquet, J. Fompeyrine, D. J.
Webb, Ch. Dieker and Jin Won Seo
Appl. Phys. Lett. 89, 053506 (2006). |
| [2] |
Thermal stability of the SrTiO3/(Ba,Sr)O
stacks epitaxially grown on Si
C. Marchiori, M. Sousa, A. Guiller, H. Siegwart, J. P. Locquet,
J. Fompeyrine, G.J. Norga and J. W. Seo.
Appl. Phys. Lett. 88, 72913 (2006). |
| [3] |
High-k dielectrics for the gate stack
J.-P. Locquet, C. Marchiori, M. Sousa, J. Fompeyrine and J.
W. Seo,
J. Appl. Phys., 100, 051610 (2006). |
| [4] |
Phase stability of LaSrCoO3 films upon
annealing in hydrogen atmosphere
C. Rossel, A. Rosová, K. Huseková, D. Machajdík,
and K. Fröhlich
J. Appl. Phys. 100, 044501 (2006). |
| [5] |
The role of Si orientation and temperature
on the carrier mobility in metal oxide semiconductor field-effect
transistors with ultra-thin HfO2 gate dielectrics
B. Mereu, C. Rossel, E. P. Gusev and M. Yang
J. Appl. Phys. 100, 014504 (2006). |
| [6] |
Solid phase epitaxy of SrTiO3 on (Ba,Sr)O/Si(100):
the relationship between oxygen stoichiometry and interface
stability
G.J. Norga, C. Marchiori, C. Rossel, A. Guiller, J.P. Locquet,
H. Siegwart, D. Caimi and J. Fompeyrine, J. W. Seo and Ch. Dieker
J. Appl. Phys. 99, 84102 (2006). |
| [7] |
Electrical characterization of La2Hf2O7
and HfO2 gate dielectrics deposited by molecular beam epitaxy
Z. M. Rittersma, J. C. Hooker, J.-P. Locquet, C. Marchiori,
M. Sousa, J. Fompeyrine, L. Pantisano, T. Schram, M. Rosmeulen,
S. De Gendt, G. Vellianitis and A. Dimoulas,
J. Appl. Phys., 99, 024508 (2006). |
| [8] |
Band-edge high performance high-K/metal
gate n-MOSFETs using Cap Layers containing Group IIA and IIIB
elements with Gate-First Processing for 45 nm and beyond
V. Narayanan, V. K. Paruchuri, N. A. Bojarczuk, B. P. Linder
B. Doris, Y. H. Kim, S. Zafar, J. Stathis, S. Brown, J. Arnold,
M. Copel, M. Steen, E. Cartier,
A. Callegari, P. Jamison, J.-P. Locquet, D. L. Lacey, Y. Wang,
P. E. Batson, P. Ronsheim, R. Jammy, M. P. Chudzik, M. Ieong,
S. Guha, S. Shahidi and T. C. Chen,
VLSI Technology Digest of Technical Papers, T22_2 (2006) |
| [9] |
Phase of reflection high-energy electron
diffraction oscillations during (Ba,Sr)O epitaxy on Si(100):
A marker of Sr barrier integrity
G.J. Norga, C. Marchiori, , A. Guiller J. P. Locquet, C. Rossel,
H. Siegwart, D.Caimi, J. Fompeyrine and T. Conard
Appl. Phys. Lett. 87, 262905 (2005). |
| [10] |
Interface formation and defect structures
in epitaxial La2Zr2O7 thin films on Si
J.W. Seo, J. Fompeyrine, A. Guiller, G. Norga, C. Marchiori,
H. Siegwart and J.-P. Locquet,
Appl. Phys. Lett. 83, 5211-5213 (2003). |
| [11] |
Charging Effects on the Carrier Mobility
in Silicon-on-Insulator Wafers Covered
with a High-k Layer
D. Halley, G. Norga, A. Guiller, J. Fompeyrine, J.-P. Locquet,
U. Drechsler, H.Siegwart and C. Rossel
J. Appl. Phys. 94, 6607(2003). |
|
|