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As the throughput rates of next-generation servers approach several
terabits per second, the chip-to-chip interconnects within such
(and similar) systems are becoming a major bottleneck for overall
performance.
Recognizing the importance of the "interconnect bottleneck", a
dedicated group is working on new technologies and advanced solutions
in the field of high-speed, high-density chip-to-chip interconnects
for next-generation servers and similar systems. The primary goal
of this group is to establish new technologies and invent advanced
solutions in the field of high-speed, high-density, chip-to-chip
interconnects for next-generation microprocessors. Mixed electrical/optical
links are of special interest.
The group's activities concentrate on
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architectural studies of mixed electrical/optical
serial links, |
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circuit design and simulation of key building
blocks that optimally fit the proposed architectures, |
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characterization of board and cable interconnect
wires, as well as |
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very high-frequency characterization and modeling
of IBM's next-generation CMOS processes. |
The group maintains a number of collaborations with internal and
external partners, for example in the framework of two related KTI
(Kommission für Technologie und Innovation) projects and CASE
(Center for Advanced Silicon Electronics).
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