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Selected publications

 

  1. C. Kromer, G. Sialm, T. Morf, M. Schmatz, F. Ellinger, D. Erni, H. Jäckel, "A low-power 20-GHz 52-dB transimpedance amplifier in 80-nm CMOS", IEEE Journal of Solid-State Circuits, Volume 39, Issue 6, June 2004, pp. 885-894
  2. T. Toifl, C. Menolfi, M. Kossel, T. Morf, M. Schmatz, "A 23GHz differential amplifier with monolithically integrated T-coils in 0.09µm CMOS technology", IEEE Microwave Symposium Technical Digest, Philadelphia, June 2003
  3. M. Kossel, T. Morf, W. Baumberger, A. Biber, C. Menolfi, T. Toifl, M. Schmatz, "A multiphase PLL for 10 Gb/s links in SOI CMOS technology", Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers, June 2004
  4. C. Menolfi, T. Toifl, M. Ruegg, R. Reutemann, P. Buchmann, M. Kossel, T. Morf, J. Weiss, M. Schmatz, "A 25Gb/s PAM4 transmitter in 90nm CMOS SOI", International Solid-State Circuits Conference (ISSCC) 2005, Digest of Technical Papers, Feb. 2005
  5. M. Kossel, P. Buchmann, C. Menolfi, T. Morf, M. Schmatz, T. Toifl, J. Weiss, "Low-jitter 10 GHz multiphase PLL in 90 nm CMOS", International Solid-State Circuits Conference (ISSCC) 2005, Digest of Technical Papers, Feb. 2005
  6. T. Morf, C. Menolfi, T. Toifl, C. Kromer, G. Sialm, M. Kossel, J. Weiss, "Electrical and Optical Transceivers for Short-Range Data Communication, Fabricated in VLSI 90 nm Bulk and SOI CMOS Technology", proc. of IEEE Compound Semiconductor IC Symposium CSICS Palm Springs, CA, USA, Oct. 30-Nov. 2. 2005
  7. C. Kromer, G. Sialm, C. Berger, T. Morf, M. Schmatz, F. Ellinger, D. Erni, G. Bona, H. Jäckel, "A 100-mW 4x10 Gb/s transceiver in 80-nm CMOS for high-density optical interconnects", IEEE Journal of Solid-State Circuits, Volume 40, Issue 12, Dec. 2005, pp. 2667-2679
  8. T. Toifl, C. Menolfi, M. Ruegg, R. Reutemann, P. Buchmann, M. Kossel, T. Morf, J. Weiss, M. Schmatz, "A 0.94-ps-RMS-jitter 0.016-mm2 2.5-GHz multiphase generator PLL with 360° digitally programmable phase shift for 10-Gb/s serial links", IEEE Journal of Solid-State Circuits, Volume 40, Issue 12, Dec. 2005, pp. 2700-2712
  9. J. Weiss, M. Kossel, C. Menolfi, T. Morf, M. Schmatz, T. Toifl, H. Jäckel, "A DC-to-44-GHz 19dB Gain Amplifier in 90nm CMOS Using Capacitive Bandwidth Enhancement", International Solid-State Circuits Conference (ISSCC) 2006, Digest of Technical Papers, Feb. 2006
  10. T. Toifl, C. Menolfi, M. Ruegg, R. Reutemann, P. Buchmann, M. Kossel, T. Morf, J. Weiss, M. Schmatz, "A 22-Gb/s PAM-4 receiver in 90-nm CMOS SOI technology", IEEE Journal of Solid-State Circuits, Volume 41, Issue 4, April 2006, pp. 954-965
  11. C. Menolfi, T. Toifl, P. Buchmann, C. Hagleitner, M. Kossel, T. Morf, M. Schmatz, "A 16Gb/s Source-Series Terminated Transmitter in 65nm CMOS SOI", International Solid-State Circuits Conference (ISSCC) 2007, Feb. 2007
  12. T. Toifl, C. Menolfi, P. Buchmann, C. Hagleitner, M. Kossel, T. Morf, M. Schmatz, "A 72mW 0.03mm2 Inductorless 40Gb/s CDR in 65nm SOI CMOS", International Solid-State Circuits Conference (ISSCC) 2007, Feb. 2007
  13. T. Morf, M. Kossel, J. Weiss, C. Menolfi, T. Toifl, G. von Bueren, P. Buchmann, M. Schmatz, "Wide Tuning Range LC-Oscillator in 65 nm SOI CMOS, Based on Switchable Secondary Inductor", IET (IEE) Electron. Lett. 43(24) (2007) 1364-1365.
  14. T. Toifl, "Design Techniques for Ultra-Low Power and Compact Transceivers in CMOS", Wireline Forum of the International Solid-State Circuits Conference (ISSCC) 2008, Feb. 2008 (invited).
  15. M. Kossel, C. Menolfi, J. Weiss, P. Buchmann, G. von Bueren, L. Rodoni, T. Morf, T. Toifl, M. Schmatz, "A T-coil Enhanced 8.5Gb/s High-swing Source-series-terminated Transmitter in 65nm Bulk CMOS", International Solid-State Circuits Conf. (ISSCC) 2008," San Francisco.
  16. G. von Bueren, L. Rodoni, A. Huber, R. Brun, D. Holzer, M. Schmatz, H. Jäckel, "6 to 40 Gb/s Quarter-rate CDR with Data-rate Selection in 90 nm Bulk CMOS", European Solid-State Circuits Conference (ESSCIRC) 2008, Oct. 2008.
  17. M. Kossel, C. Menolfi, J. Weiss, P. Buchmann, G. von Bueren, L. Rodoni, T. Morf, T. Toifl, M. Schmatz,” A T-Coil-Enhanced 8.5 Gb/s High-Swing SST Transmitter in 65 nm Bulk CMOS With <-16 dB Return Loss Over 10 GHz Bandwidth”, IEEE Journal of Solid-State Circuits, Volume 43, Issue 12, Dec 2008, pp. 2905-2920
  18. M. Kossel, T. Morf, J. Weiss, P. Buchmann, C. Menolfi, T. Toifl, M. Schmatz, ” LC PLL With 1.2-Octave Locking Range Based on Mutual-Inductance Switching in 45-nm SOI CMOS”, IEEE Journal of Solid-State Circuits, Volume 44, Issue 2, Feb. 2009, pp. 436-449
  19. T. Toifl, C. Menolfi, P. Buchmann, M. Kossel, T. Morf, M. Schmatz, ” A small-area voltage regulator with high-bandwidth supply-rejection using a regulated replica in 45nm CMOS SOI”, IEEE Asian Solid-State Circuits Conference, Fukuoka, Japan, Nov 2008,
  20. D. A. B. Miller, "Rationale and challenges for optical interconnects to electronic chips," Proceedings of the IEEE, vol. 88, pp. 728-749, 2000.
  21. A. Benner, M. Ignatowski, J. Kash, D. Kuchta, and M. Ritter, "Exploitation of optical interconnects in future server architectures," IBM J. Res. & Dev., vol. 49, pp. 755-775, 2005.
  22. C. Berger, M. Kossel, C. Menolfi, T. Morf, T. Toifl, and M. Schmatz, "High-density optical interconnects within large-scale systems," Proc. SPIE, vol. 4942, pp. 222-235, 2003. PDF
  23. G.-L. Bona, B. Offrein, U. Bapst, C. Berger, R. Beyeler, R. Budd, R. Dangel, L. Dellmann, and F. Horst, "Characterization of parallel optical-interconnect waveguides integrated on a printed circuit board," Proc. SPIE, vol. 5453, 2004.
  24. C. Berger, U. Bapst, G.-L. Bona, R. Dangel, L. Dellmann, P. Dill, M. A. Kossel, T. Morf, B. Offrein, and M. L. Schmatz, "Design and implementation of an optical interconnect demonstrator with board-integrated waveguides and microlens coupling," presented at Biophotonics/Optical Interconnects and VLSI Photonics/WBM Microcavities, 2004 Digest of the LEOS Summer Topical Meetings, 2004.
  25. R. Dangel, U. Bapst, C. Berger, R. Beyeler, L. Dellmann, F. Horst, B. Offrein, and G.-L. Bona, "Development of a low-cost low-loss polymer waveguide technology for parallel optical interconnect applications," presented at Biophotonics/Optical Interconnects and VLSI Photonics/WBM Microcavities, 2004 Digest of the LEOS Summer Topical Meetings, 2004.
  26. L. Dellmann, T. Lamprecht, S. Oggioni, M. Witzig, R. Dangel, R. Beyeler, C. Berger, F. Horst, and B. Offrein, "Butt-Coupled Optoelectronic Modules for High-Speed Optical Interconnects," Proc. CLEO/Europe-EQEC 2005, Munich, 2005.
  27. C. Kromer, G. Sialm, C. Berger, T. Morf, M. L. Schmatz, F. Ellinger, D. Erni, G.-L. Bona, and H. Jackel, "A 100-mW 4x10 Gb/s Transceiver in 80-nm CMOS for High-Density Optical Interconnects," Solid-State Circuits, IEEE Journal of, vol. 40, pp. 2667-2679, 2005.
  28. B. Offrein, C. Berger, R. Beyeler, R. Dangel, L. Dellmann, F. Horst, T. Lamprecht, N. Meier, R. Budd, F. Libsch, and J. Kash, "Parallel optical interconnects in printed circuit boards," Proc. SPIE, vol. 5990, pp. 117-125, 2005.
  29. T. Morf, C. Menolfi, T. Toifl, C. Kromer, G. Sialm, M. Kossel, J. Weiss, P. Buchmann, C. Berger, and M. Schmatz, "Electrical and optical transceivers for short-range data communication, fabricated in VLSI 90-nm bulk and SOI CMOS technology," presented at Compound Semiconductor Integrated Circuit Symposium, 2005. CSIC '05. IEEE, 2005.
  30. T. Lamprecht, F. Horst, R. Dangel, R. Beyeler, N. Meier, L. Dellmann, M. Gmür, C. Berger, and B. Offrein, "Passive Alignment of Optical Elements in a Printed Circuit Board," presented at 56th Electronic Components and Technology Conference (ECTC 2006), San Diego, 2006.
  31. C. Berger, L. Dellmann, P. Dill, F. Horst, B. Offrein, M. Schmatz, S. Oggioni, M. Spreafico, G. Macario, "Integration of Optical I/O with Organic Chip Packages", in Photonics Packaging, Integration, and Interconnects VIII, edited by A.L. Glebov, R.T. Chen, Proc. SPIE, Vol. 6899, 689912 (2008). Proceedings Photonics West 2008, San Jose, CA, January 2008.
  32. National Committee for Information Technology Standardization (NCITS), T11.2/Project 1230.
  33. IEEE Draft P802.3ae/D4.0 Annex 48B.
  34. Blue Logic High-Speed SERDES Family of Cores, IBM Microelectronics Divison, Publication number G522-0610-00.

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