Server scaling by functional electronic packaging

Within six years, data cen­ter foot­prints have been re­duced 286-fold. In­ter­est­ing­ly, elec­tron­ic pack­ag­ing has con­trib­ut­ed as much to den­si­fi­ca­tion as tran­sis­tor scal­ing af­ter Moore’s Law.

—IBM scientist Thomas Brunschwiler

Over the past few decades, we have witnessed a tremendous improvement in compute performance, efficiency and miniaturization of digital devices. From historic data, Ruch et al. [1] identified a strong correlation between data center compute efficiency and compute density across four generations of switch technologies.

The impact of the exponential progress can be illustrated by comparing the hardware and power required to achieve a sustainable LINPACK performance of 100 TFLOPS in a data center (Figure 1). In 2005, 126 racks and 28 computer room air handlers (CRAHs) were required, compared to 12 racks and 2 CRAHs in 2008 and finally, in 2011, only one rack, 100% water cooled. In total, a footprint and power reduction of 286-fold and 19-fold, respectively, was achieved over those six years. Interestingly, only half the dimensional scaling can be attributed to Moore’s law, whereas the other half of the densification was achieved by advances in electronic packaging technologies.


Footorint evolution of high-performance data centers
Figure 1: Footprint evolution of high-performance data centers equipped with PowerPC CPUs of subsequent generations, hosting 100 TFLOPS of compute performance.


And there is still plenty of room for improvement considering the active transistor volume of less than 1 ppm relative to the total system volume of current systems. Therefore, 3D stacking in combination with functional electronic packaging, such as embedded liquid cooling, on-chip voltage regulation and on-module optics, is being explored (Figure 2).


Integrated circuit module depicting embedded-liquid cooling, on-chip voltage regulation and on-module optics
Figure 2: Integrated circuit module depicting embedded-liquid cooling, on-chip voltage regulation and on-module optics.


References

[1] P. Ruch, T. Brunschwiler, W. Escher, S. Paredes, and B. Michel, “Toward five-dimensional scaling: How density improves efficiency in future computers,” IBM J. Res. Devel. 55(5) 15:1-15:13, Sept.-Oct. 2011.

[2] T. Brunschwiler, et al., “Functional electronic packaging for dense server-system scaling,” Proceedings Pan Pacific Microelectronics Symposium, Kauai, 2017 (submitted).


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Thomas Brunschwiler

Thomas Brunschwiler

IBM Research scientist