Enterprise solid-state storage


Solid-state persistent memory such as flash has been introduced in the enterprise environment as it improves on several factors compared to disk, most notably IO performance and power efficiency.

Our activities focus on the advanced use of these technologies in enterprise-class systems. There is also the trend towards using multi-level cell flash memory (MLC) in enterprise storage systems, which requires further advances in flash management and signal processing to address endurance, retention, and integrity/reliability issues properly. Furthermore, new non-volatile memory technologies such as phase change memory (PCM) are expected to induce significant changes from the server and storage architectures up to the middleware and application design as they need to be introduced into the existing storage/memory hierarchy.

Solid-state storage
Impact of flash and future storage-class memories in the storage and memory hierarchies.

We are designing and evaluating holistic approaches to sustained high-IO operation rates, low latency, and error detection and correction from the low-level data block up to the array level. In addition, we are investigating the potential for synergies between the various layers (devices, controller, file systems, virtualized systems, and applications).

Solid-state storage
Technologies such as phase-change memory will
dramatically improve endurance and density com-
pared to flash and hence will be very attractive for
enterprise storage systems.
We have studied the performance of solid-state drives, and in particular the effect of scheduling the user-generated read and write commands and the read, write, and erase operations induced by the garbage-collection process on the basic performance measures throughput and latency. We have demonstrated that the most straightforward scheduling that prioritizes the processing of garbage-collection-related commands over user-related commands suffers from severe latency deficiencies.

These problems can be overcome by using a more sophisticated priority scheme that minimizes the user-perceived latency without throughput penalty or deadlock exposure. Using both analysis and simulation, we have investigated how these schemes perform under a variety of system design parameters and workloads.

Our results can be directly applied to the engineering of a performance-optimized solid-state-drive system.

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