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As
device dimensions continue to shrink into the nanometer length-scale
regime, conventional complementary metal-oxide semiconductor (CMOS)
technology will approach its fundamental physical limits. Further
miniaturization based on conventional scaling appears neither technically
nor economically feasible. New strategies, including the use of
novel materials and one-dimensional (1D) device concepts, innovative
device architectures, and smart integration schemes need to be
explored and assessed. They are crucial to extending current capabilities
and maintaining momentum beyond the end of the technology roadmap
time frame (post-CMOS era).
Researchers
at the IBM Zurich Research Laboratory (ZRL) have set up an agenda
for extensive investigation of functional nanostructures for ultimate
and post-CMOS devices, focusing in particular on one-dimensional
semiconductor nanowires.
Nanowires, measuring typically 2 to 100 nm in diameter, can have
significantly different electrical, optical and magnetic properties
compared with their “bulk” counterparts. By virtue
of their potential one-dimensionality, such nanoscale
structures allow a better control of quantum confinement effects,
thus enabling new functionalities and device concepts.
Research activities at ZRL address fundamental aspects such as control and
optimization of nanowire
growth, the study of the charge transport
properties and scaling behavior of nanowires and nanowire devices,
novel device concepts, modeling and simulations, as well as technological
issues such as processing, fabrication, integration and up-scalability. |
