Figure 1. Schematic illustration of the various application spaces of III–V materials and devices on Si.
Figure 2. Bandgap versus lattice constant of several semiconductors of technological relevance. The greater the difference in lattice constant between two materials, the more challenging their co-integration.
Figure 3. Schematic illustration of the material challenges to three levels of technology sophistication going from conventional Si CMOS to III–V-based CMOS and to III–V TFET technologies.
III–V materials provide several advantages over silicon. They have lower effective masses, higher mobilities and a direct bandgap, which renders them more suitable for both photonic and tunneling devices. Silicon has been and will continue to be the semiconductor of choice for the electronics industry. Si is abundant, low cost, robust and provides an ideal passivation in terms of the high-quality SiO2 oxide.
In order to combine the best of both worlds, III–V integration on Si is of great technical as well as economic interest and has been pursued for many years. A visionary example of embedded device integration is illustrated schematically in Fig. 1. Close proximity of III–V devices with Si-based circuits can improve system performance or even enable new application areas. It is also anticipated that system fabrication costs will be significantly lower than discrete chip packaging approaches.
Accordingly, many different approaches towards this goal have been developed, ranging from the mechanical transfer of III–V device layers to a Si wafer as well as growing epitaxial films directly on Si. One of the key challenges to epitaxial approaches is to overcome material defects stemming from the crystal lattice mismatch with Si. Figure 2 shows the lattice constant and bandgap of various important III–V compounds, including Si.
“At IBM we are interested in monolithic III–V on Si integration for a number of applications spanning photonics, electronics and quantum devices.”
—IBM scientist Kirsten Moselund
When it comes to electronic devices, we are working on both III–V CMOS, where III–V material is introduced for the n–MOSFET channels, because materials such as Inas or InGaAs provide much higher electron mobilities, and thereby greater drive currents compared to their silicon counterparts.
The evolution of complementary technologies in terms of technological complexity is shown in Fig. 3. Here we go from conventional Si-based CMOS, where devices are defined by doping, to III–V SiGe CMOS with two different material bases for each device, to tunnel FET devices, where the need for the heterojunction dictates the use of multiple materials within the same channels.
On the following pages you will be able to get more information about our activities in these domains, as well as on other topics related to III–V on Si electronic devices.